| Radar Processing |
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Over-The-Horizon Radar signal processing |
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Clutter Mitigation, CFAR detection |
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MATLAB Parallel Toolbox implementation and speed-up |
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Bistatic Radar array signal processing |
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Pulse compression, Beamforming, Bistatic STAP with Joint Domain Localization, CFAR detection |
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MATLAB implementation. Target + clutter test data generation and performance test |
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Architected data distribution / processor loading for minimum latency |
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Distributed/parallel software implementation on multi-core Intel array processing platform with AVX2/IPP |
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Programmed in Gedae IDEA language. Successful embedded demonstration at customer facility |
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MIMO Radar clutter modeling software development |
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Pulse Doppler radar signal processing system |
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MATLAB, 'C' language, and CUDA implementations |
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Benchmark timing showed 15x speedup |
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Ground Penetrating Radar signal processing implementation |
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Converted signal processing routine from MATLAB to C language. Runtime optimizations |
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66AK2H12 multi-core implementation: architecture, resource allocation, data transfer |
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CW /FMCW vital signs measurement system |
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Detailed radar and hardware analysis (waveform, power, antenna structure, circuit design) for solving issues |
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Algorithm development for vital signs detection and estimation |
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Machine learning for detection of signal presence/absence |
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Time-of-arrival and Doppler tracking for coherent laser radar system.
Time-of-arrival estimation & tracking for non-coherent pulsed laser radar system.
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Interference cancellation in heavy clutter environment |
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Penalty function tracker implementation, optimization |
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FPGA design spec and debug |
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Successful flight tests for tracking through extreme clutter environment |
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FM CW high resolution industrial measurement system |
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System concept analysis / prototype definition |
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FM CW radar for low observable targets |
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Signal in space simulation |
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Computational estimation, component specification |
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"Range-Dependence Compensation for Bistatic STAP using Focusing Matrices," presented at IEEE Int. Conf. on Radar 2015 |
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| Multi-User SATCOM systems |
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Multi-User Detection for Blue Force tracking |
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MATLAB-based DSSS/CDMA demodulator |
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PowerPC/Altivec-based DSSS/CDMA demodulator |
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Fixed-point software implementation for receiver system |
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Debug of FPGA-based implementation with test vector generation/verification |
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Multiple improvements to Multi-User Detection algorithms. U. S. Patent #12/692,789 awarded |
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Research, development and implementation of Fast M-Sequence Transform Detector |
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Miniature handheld SATCOM at very low SNR |
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Currently sold in commercial marketplace |
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DSSS waveform design with unique pilot sequences for synchronization |
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MATLAB-based end-to-end simulation |
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FPGA design specs for embedded transmitter and multi-user ground station receiver |
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Realtime software implementation on Xeon multi-core under Linux |
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Successful real data transmit/receive over Geosynchronous satellite |
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U.S. Patents awarded: 9,692,587 Phase Tracking; 9,548,790 Timing estimation in communications systems; 9,887,730 Timing estimation in communications systems; 10,116,893 Selectively Controlling a Direction of Signal Transmission Using Adaptive Augmented Reality;
10,164,723 Adaptive augmented reality satellite acquisition; 10,218,408 Synchronized CPDMA (code phase division multiple access); 10,267,888 Pointing an antenna at a signal source using augmented reality.
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| Software Defined Radio / JTRS |
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Primary DSP architect for first fielded JTRS radio |
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MIL-STD-188-181C / IW CPM modems |
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AM/FM/ASK/FSK Secure KY57 modems |
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Symbol synchronization upgrade for SINCGARS modem |
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ANDVT/SBPSK SATCOM modem |
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Combat Survivor Emitter Locator (AN/PRQ-7) modems |
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AM/PSK/DSSS modulation, Transceiver control |
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Secure KY57 upgrade |
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Havequick modem for AN/PRC-148 radio |
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SINCGARS interference cancellation for AN/PRC-148 radio |
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LPC-10 speech codec for AN/PRC-148 radio |
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Retransmit adaptive fractional delay, data communications for AN/PRC-148 radio |
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Viterbi decoder for Project 25 radio |
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CVSD speech codec for SWS radio |
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| Complex QAM Demods |
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FPGA & Graychip-based wideband QAM demodulators |
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FPGA & Graychip-based wideband Offset QPSK demodulator |
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FPGA-based Viterbi decoder for multi-dimensional trellis modulation |
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FPGA-based digital downconverter |
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Systemview bit-level simulations for timing and carrier tracking, multi-D Viterbi decoder |
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| Software Defined Test and Measurement |
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System design of Software-Defined RF Test & Measurement System (SDT&M) |
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Spectrum Analyzer, Vector Signal Generator, Vector Signal Analyzer, Modulation Analyzer, Navigation Signal Analyzer (VOR, TACAN, DME) |
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PowerPC/Altivec-based implementation of SDT&M |
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Configuration of wideband DDC/channelizers |
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| Modulation Recognition, Multi-mode Demods |
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C software to recognize and demodulate extensive set of ITU-T digital modems |
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V.22,V.26,V.27,V.29,V.32 |
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Realtime multi-channel T.30 demodulation for FAX recognition |
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Improved performance of carrier and symbol synchronization modules |
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Selection of DSP boards for hosting real-time system |
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TMS320C40-based Modulation recognition system |
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Application of cyclostationary techniques for modulation recognition |
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MIT/Lincoln Labs LNKNet pattern recognition implementation |
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CPFSK/CPM demodulator |
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| Speech Enhancement and Coding |
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PowerPC/Altivec-based G.726 ADPCM codec |
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TMS320C6000-based G.729 speech codec |
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MATLAB-based model-based speech enhancement techniques |
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MATLAB-based generic speech models from training data using vector quantization and a Hidden Markov Model (HMM) approach |
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ADSP-21060-based HMM Speech Enhancement |
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MATLAB-based speech enhancement and speaker identification algorithms using the HMM approach |
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MATLAB-based Spectral Lateral Inhibition algorithm for speech enhancement in low SNR environments. Increased output SNR by 6 dB over original system |
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| Operational SIGINT development |
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Developed cyclostationary interference cancellation software and improved performance against simulated data |
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Implemented software and demodulator performance improvements in operational SIGINT system and characterized performance against real data |
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Extended MIDAS standard signal processing package to run in real-time on Aptec Vector Signal Processors and Cray supercomputers |
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Including high-speed I/O using a caching scheme and vectorization of signal processing code to improve speed |
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